The PSS 4000-R system has been in service in the rail transit industry for more than a decade, and now PILZ has upgraded it with the second generation of the PSS 4000-R system, the PSS u2 P42-R. The hardware architecture of the second generation PSS 4000-R system is based on the PSS u2 distributed I/O system, so the second generation PSS 4000-R system has a similar appearance, installation and characteristics of the PSS u2 distributed I/O system.

 

The core of the second generation PSS 4000-R system is a safe CPU module -PSS u2 P42 F/S-R, which has a great improvement in safety performance compared with the first generation. Now only one PSS u2 P42 F/S-R safe CPU module can achieve the SIL 4 application scenario, in the past, it needed two safe CPU modules, and no longer need to consider the synchronization between the two safe CPU modules, greatly reducing the complexity of the system, reducing the user’s design stage time and energy.

The second generation PSS 4000-R system from the point of view of system structure design compared to the past to save nearly 50% of the width, the input and output module of PSS u2 is highly integrated, and the 12.5mm width module can achieve up to 8 points of safe input or safe output, 16 points of non-safe input or non-safe output.

Secure CPU module – PSS u2 P42 F/S-R integrated Ethernet interface for program upload and download, fault diagnosis and communication with other devices. Its communication features include SafeyNET p protocol secure communication with other PSS 4000 sites, and non-secure communication with third-party devices over Modbus/TCP, TCP, and UDP.

Adopting the second generation PSS 4000-R system as the rail transit safety system solution to achieve SIL4, SIL3, SIL2 and other frameworks can meet the safety requirements and achieve the high cost performance of the scheme.

SIL 4 structural characteristics

– Only 1 secure CPU module

– Redundant input loops require separate power modules

– Redundant output loops require independent power modules

Structural characteristics of SIL 3

– Only 1 secure CPU module

– Redundant input loop

– Redundant output loop

– The entire system shares one power module

Structural characteristics of SIL 2

– Only 1 secure CPU module

– Non-redundant input loop

– Non-redundant output loop

– The entire system shares one power module