VMIVME-7740-840  Processor-Based VMEbus SBC

VMIC’s VMIVME-7740 is a complete Pentium III processor-based computer with the
additional benefits of single Eurocard construction and full compatibility with the
VMEbus Specification Rev. C.1. The VMIVME-7740, with advanced VMEbus interface
and RAM that is dual-ported to the VMEbus, is ideal for multiprocessor applications.
The single CPU board functions as a standard PC/AT, executing a PC/AT-type
power-on self-test, then boots up MS-DOS, Windows 95, Windows NT, or any other
PC compatible operating system. The standard PC features of the VMIVME-7740 are
discussed in Chapter 3 of this manual.
The VMIVME-7740 also operates as a VMEbus controller and interacts with other
VMEbus modules via the on-board PCI-to-VMEbus bridge and the Endian conversion
hardware.

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Description

VMIVME-7740-840  Processor-Based VMEbus SBC

VMIC’s VMIVME-7740 is a complete Pentium III processor-based computer with the
additional benefits of single Eurocard construction and full compatibility with the
VMEbus Specification Rev. C.1. The VMIVME-7740, with advanced VMEbus interface
and RAM that is dual-ported to the VMEbus, is ideal for multiprocessor applications.
The single CPU board functions as a standard PC/AT, executing a PC/AT-type
power-on self-test, then boots up MS-DOS, Windows 95, Windows NT, or any other
PC compatible operating system. The standard PC features of the VMIVME-7740 are
discussed in Chapter 3 of this manual.
The VMIVME-7740 also operates as a VMEbus controller and interacts with other
VMEbus modules via the on-board PCI-to-VMEbus bridge and the Endian conversion
hardware.
The VMIVME-7740 may be accessed as a VMEbus slave board. The VMEbus functions
are available by programming the VMIVME-7740’s PCI-to-VMEbus bridge according
to the references defined in this volume and/or in the second volume dedicated to the
optional PCI-to-VMEbus interface board titled: VMIVME-7740 Tundra Universe
II™-Based VMEbus Interface Product Manual (document No. 500-007740-001).
Throughout this manual, all references to the Universe II refer to the Universe IIB.
The VMIVME-7740 programmer may quickly and easily control all the VMEbus
functions simply by linking to a library of VMEbus interrupt and control functions.
This library is available with VMIC’s VMISFT-9420 IOWorks Access software for
Windows NT users.
The VMIVME-7740 also provides capabilities beyond the features of a typical
PC/AT-compatible SBC including general-purpose timers, a programmable
Watchdog Timer, a bootable flash disk system, and nonvolatile SRAM. These features
make the unit ideal for embedded applications. These nonstandard PC/AT functions
are discussed in Chapter 4 of this manual.

VMIVME-7740-850

This product bridges the traditionally divergent worlds of Intel-based PC’s and
Motorola-based VMEbus controllers; therefore, some confusion over “conventional”
notation and terminology may exist. Every effort has been made to make this manual
consistent by adhering to conventions typical for the Motorola/VMEbus world;
nevertheless, users in both camps should review the following notes:
• Hexadecimal numbers are listed Motorola-style, prefixed with a dollar sign:
$F79, for example. By contrast, this same number would be signified 0F79H
according to the Intel convention, or 0xF79 by many programmers. Less
common are forms such as F79h or the mathematician’s F7916.
• An 8-bit quantity is termed a “byte,” a 16-bit quantity is termed a “word,” and a
32-bit quantity is termed a “longword.” The Intel convention is similar,
although their 32-bit quantity is more often called a “doubleword.”
• Motorola programmers should note that Intel processors have an I/O bus that
is completely independent from the memory bus. Every effort has been made in
the manual to clarify this by referring to registers and logical entities in I/O
space by prefixing I/O addresses as such. Thus, a register at “I/O $140” is not
the same as a register at “$140,” since the latter is on the memory bus while the
former is on the I/O bus.
• Intel programmers should note that addresses are listed in this manual using a
linear, “flat-memory” model rather than the old segment:offset model
associated with Intel Real Mode programming. Thus, a ROM chip at a
segment:offset address of C000:0 will be listed in this manual as being at
address $C0000. For reference, here are some quick conversion formulas:
Segment:Offset to Linear Address
Linear Address = (Segment × 16) + Offset
Linear Address to Segment:Offset
Segment = ((Linear Address ÷ 65536) − remainder) × 4096
Offset = remainder × 65536
Where remainder = the fractional part of (Linear Address ÷ 65536)
Note that there are many possible segment:offset addresses for a single location. The
formula above will provide a unique segment:offset address by forcing the segment to
an even 64 Kbyte boundary, for example, $C000, $E000, etc. When using this formula,
make sure to round the offset calculation properly

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